add memory cell and rework logic construction (#24983)

* rework construction to be deconstructable, add memory cell

* update textures

* add code

* add memory cell and ports, empty circuit

* d

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Co-authored-by: deltanedas <@deltanedas:kde.org>
This commit is contained in:
deltanedas
2024-08-18 22:34:43 +00:00
committed by GitHub
parent 6cda6c8ba5
commit ad691931c6
13 changed files with 264 additions and 17 deletions

View File

@@ -0,0 +1,40 @@
using Content.Server.DeviceLinking.Systems;
using Content.Shared.DeviceLinking;
using Robust.Shared.Prototypes;
namespace Content.Server.DeviceLinking.Components;
/// <summary>
/// Memory cell that sets the output to the input when enabled.
/// </summary>
[RegisterComponent, Access(typeof(MemoryCellSystem))]
public sealed partial class MemoryCellComponent : Component
{
/// <summary>
/// Name of the input port.
/// </summary>
[DataField]
public ProtoId<SinkPortPrototype> InputPort = "MemoryInput";
/// <summary>
/// Name of the enable port.
/// </summary>
[DataField]
public ProtoId<SinkPortPrototype> EnablePort = "MemoryEnable";
/// <summary>
/// Name of the output port.
/// </summary>
[DataField]
public ProtoId<SourcePortPrototype> OutputPort = "Output";
// State
[DataField]
public SignalState InputState = SignalState.Low;
[DataField]
public SignalState EnableState = SignalState.Low;
[DataField]
public bool LastOutput;
}